Each of these data selectors/multiplexers contains inverters and drivers to supply full binary decoding data selection to the AND-OR gates. Separate output-control inputs are provided for each of the two 4-line sections.
The 3-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (in the high-impedance state), the low impedance of the single enabled output drives the bus line to a high or low logic level. Each output has its own output-enable (OE)\ input. The outputs are disabled when their respective OE\ is high.
Products containing the "SN54HC253" keyword are: SN54HC253J , SN54HC253J.| Status | ACTIVE |
| SubFamily | Encoders & decoders |
| Technology Family | HC |
| VCC | 6 |
| Bits | 4 |
| Voltage | 3.3^5 |
| F @ nom voltage | 28 |
| ICC @ nom voltage | 0.08 |
| tpd @ Nom Voltage | 38 |
| Rating | Military |
| Operating temperature range | -55 to 125 |
| Package Group | CDIP|16 |
| Package size: mm2:W x L (PKG) | See datasheet (CDIP) |
| Approx. price |