CD74HCT423 - High Speed CMOS Logic Dual Retriggerable Monostable Multivibrators with Reset

The ’HC123, ’HCT123, CD74HC423 and CD74HCT423 are dual monostable multivibrators with resets. They are all retriggerable and differ only in that the 123 types can be triggered by a negative to positive reset pulse; whereas the 423 types do not have this feature. An external resistor (R_X) and an external capacitor (C_X) control the timing and the accuracy for the circuit. Adjustment of Rx and C_X provides a wide range of output pulse widths from the Q and Q\ terminals. Pulse triggering on the A\ and B inputs occur at a particular voltage level and is not related to the rise and fall times of the trigger pulses.

Once triggered, the output pulse width may be extended by retriggering inputs A\ and B. The output pulse can be terminated by a LOW level on the Reset (R) pin. Trailing edge triggering (A)\ and leading edge triggering (B) inputs are provided for triggering from either edge of the input pulse. If either Mono is not used each input on the unused device (A\, B, and R\) must be terminated high or low.

The minimum value of external resistance, Rx is typically 5k. The minimum value external capacitance, C_X, is 0pF. The calculation for the pulse width is t_W = 0.45 R_XC_X at V_CC = 5V.

Products containing the "CD74HCT423" keyword are: CD74HCT423E , CD74HCT423E , CD74HCT423EE4 , CD74HCT423M96 , CD74HCT423M96 , CD74HCT423M96E4 , CD74HCT423M96G4 , CD74HCT423M96G4 , CD74HCT423MT , CD74HCT423MT , CD74HCT423MTE4 , CD74HCT423MTE4 , CD74HCT423MTG4 , CD74HCT423MTG4 , CD74HCT423MTV

• Overriding Reset Terminates Output Pulse
• Triggering From the Leading or Trailing Edge
• Q and Q\ Buffered Outputs
• Separate Resets
• Wide Range of Output-Pulse Widths
• Schmitt Trigger on Both A\ and B Inputs
• Fanout (Over Temperature Range)
  • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
  • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . –55°C to 125°C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
  • 2V to 6V Operation
  • High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC at V_CC = 5V
• HCT Types
  • 4.5V to 5.5V Operation
  • Direct LSTTL Input Logic Compatibility, V_IL = 0.8V (Max), V_IH = 2V (Min)
  • CMOS Input Compatibility, I_l 1µA at V_OL, V_OH