SN74ALS273 - Octal D-Type Positive-Edge-Triggered Flip-Flops With Clear

These octal positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct-clear () input.

Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input signal has no effect at the output.

The SN54ALS273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS273 is characterized for operation from 0°C to 70°C.

 

 

Products containing the "SN74ALS273" keyword are: SN74ALS273DB , SN74ALS273DBR , SN74ALS273DBR G273 , SN74ALS273DBRG4 , SN74ALS273DW , SN74ALS273DW , SN74ALS273DWE4 , SN74ALS273DWR , SN74ALS273DWR , SN74ALS273DWRE4 , SN74ALS273DWRG4 , SN74ALS273DWRG4 , SN74ALS273N , SN74ALS273N , SN74ALS273NE4 , SN74ALS273NG4 , SN74ALS273NS , SN74ALS273NSEL , SN74ALS273NSR , SN74ALS273NSRG4

• Contain Eight Flip-Flops With Single-Rail Outputs
• Buffered Clock and Direct-Clear Inputs
• Individual Data Input to Each Flip-Flop
• Applications Include:
• Buffer/Storage Registers
• Shift Registers
• Pattern Generators
• Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs