These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the '175, 'LS175, and 'S175 feature complementary outputs from each flip-flop.
Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output.
These circuits are fully compatible for use with most TTL circuits.
Products containing the "SN54LS174" keyword are: SN54LS174J , SN54LS174J/883B , SN54LS174J8546 , SN54LS174W , SN54LS174WB| Status | ACTIVE |
| SubFamily | D-type flip-flop |
| Technology Family | LS |
| VCC | 5.25 |
| Bits | 6 |
| Voltage | 5 |
| F @ nom voltage | 35 |
| ICC @ nom voltage | 26 |
| tpd @ Nom Voltage | 30 |
| 3-state output | No |
| Rating | Military |
| Operating temperature range | -55 to 125 |
| Package Group | CDIP|16 |
| Package size: mm2:W x L (PKG) | See datasheet (CDIP) |
| Approx. price |