These 9-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.
With the clock-enable (CLKEN\) input low, the nine D-type edge-triggered flip-flops enter data on the low-to-high transitions of the clock. Taking CLKEN\ high disables the clock buffer, thus latching the outputs. Taking the clear (CLR\) input low causes the nine Q outputs to go low, independently of the clock.
A buffered output-enable (OE\) input can be used to place the nine outputs in either a normal logic state (high or low logic level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT823 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT823 is characterized for operation from -40°C to 85°C.
EPIC-IIB is a trademark of Texas Instruments Incorporated.
Status | ACTIVE |
SubFamily | D-type flip-flop |
Technology Family | ABT |
VCC | 5.5 |
Bits | 9 |
Voltage | 5 |
F @ nom voltage | 150 |
ICC @ nom voltage | 38 |
tpd @ Nom Voltage | 7.1 |
3-state output | Yes |
Rating | Military |
Operating temperature range | -55 to 125 |
Package Group | LCCC|28 |
Package size: mm2:W x L (PKG) | [pf]28LCCC[/pf]: 131 mm2: 11.43 x 11.43 (LCCC|28) |
Approx. price |