CD74HCT273 - High Speed CMOS Logic Octal D-Type Flip-Flop with Reset

The ’HC273 and ’HCT273 high speed octal D-Type flip-flops with a direct clear input are manufactured with silicon-gate CMOS technology. They possess the low power consumption of standard CMOS integrated circuits.

Information at the D inputis transferred to the Q outputs on the positive-going edge of the clock pulse. All eight flip-flops are controlled by a common clock (CP) and a common reset (MR). Resetting is accomplished by a low voltage level independent of the clock. All eight Q outputs are reset to a logic 0.

Products containing the "CD74HCT273" keyword are: CD74HCT273E , CD74HCT273E , CD74HCT273EE4 , CD74HCT273EE4 , CD74HCT273EG4 , CD74HCT273ES2065 , CD74HCT273EX , CD74HCT273M , CD74HCT273M , CD74HCT273M96 , CD74HCT273M96 , CD74HCT273M96E4 , CD74HCT273M96G4 , CD74HCT273ME4 , CD74HCT273MG4 , CD74HCT273MR2499

• Common Clock and Asynchronous Master Reset
• Positive Edge Triggering
• Buffered Inputs
• Fanout (Over Temperature Range)
  • Standard Outputs...10 LSTTL Loads
  • Bus Driver Outputs...15 LSTTL Loads
• Wide Operating Temperature Range...–55°C to 125°C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
  • 2V to 6V Operation
  • High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC at V_CC = 5V
• HCT Types
  • 4.5V to 5.5V Operation
  • Direct LSTTL Input Logic Compatibility, V_IL = 0.8V (Max), V_IH = 2V (Min)
  • CMOS Input Compatibility, I_l 1µA at V_OL, V_OH

Data sheet acquired from Harris Semiconductor