This single bus buffer gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G126-Q1 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is low.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
| Status | ACTIVE |
| SubFamily | Non-Inverting buffer/driver |
| Technology Family | LVC |
| VCC | 5.5 |
| Bits | 1 |
| Voltage | 1.8^2.5^3.3^5 |
| F @ nom voltage | 150 |
| tpd @ Nom Voltage | 5.8^4.5 |
| ICC @ nom voltage | 0.01 |
| IOL | 32 |
| IOH | -32 |
| Rating | Automotive |
| Operating temperature range | -40 to 125 |
| Package Group | SOT-23|5 |
| Package size: mm2:W x L (PKG) | [pf]5SOT-23[/pf]: 8 mm2: 2.8 x 2.9 (SOT-23|5) |
| Approx. price | 0.08 | 1ku |