The SN74LVC126A device is a quadruple bus buffer gate designed for 1.65-V to 3.6-V VCC operation.
The SN74LVC126A device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low.
To ensure the high-impedance state during power up or power down, OE must be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V and 5-V system environment.
Products containing the "SN74LVC126A" keyword are: SN74LVC126AD , SN74LVC126AD , SN74LVC126ADBR , SN74LVC126ADBR , SN74LVC126ADE4 , SN74LVC126ADE4 , SN74LVC126ADG4 , SN74LVC126ADG4 , SN74LVC126ADGVR , SN74LVC126ADGVR , SN74LVC126ADGVRE4 , SN74LVC126ADGVRE4 , SN74LVC126ADR , SN74LVC126ADR , SN74LVC126ADRE4 , SN74LVC126ADRE4 , SN74LVC126ADRG4 , SN74LVC126ADRG4 , SN74LVC126ADT , SN74LVC126ADTStatus | ACTIVE |
SubFamily | Non-Inverting buffer/driver |
Technology Family | LVC |
VCC | 3.6 |
Bits | 4 |
Voltage | 1.8^2.5^2.7^3.3 |
F @ nom voltage | 100 |
tpd @ Nom Voltage | 9.3^6.7^5^4.5 |
ICC @ nom voltage | 0.04 |
IOL | 24 |
IOH | -24 |
Rating | Catalog |
Operating temperature range | -40 to 125 |
Package Group | SOIC|14 |
Package size: mm2:W x L (PKG) | [pf]14SO[/pf]: 80 mm2: 7.8 x 10.2 (SO|14) |
Approx. price | 0.08 | 1ku |