The AHCT125 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE)\ input is high. When OE\ is low, the respective gate passes the data from the A input to its Y output.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Products containing the "SN74AHCT125" keyword are: SN74AHCT125D , SN74AHCT125D , SN74AHCT125DBR , SN74AHCT125DBR , SN74AHCT125DBR HB125 , SN74AHCT125DBRG4 , SN74AHCT125DG4 , SN74AHCT125DG4 , SN74AHCT125DGVR , SN74AHCT125DGVR , SN74AHCT125DGVRG4 , SN74AHCT125DR , SN74AHCT125DR , SN74AHCT125DR SOP3.9 , SN74AHCT125DR2 , SN74AHCT125DRE4 , SN74AHCT125DRG4 , SN74AHCT125DRG4 , SN74AHCT125N , SN74AHCT125NStatus | ACTIVE |
SubFamily | Non-Inverting buffer/driver |
Technology Family | AHCT |
VCC | 5.5 |
Bits | 4 |
Voltage | 5 |
F @ nom voltage | 110 |
tpd @ Nom Voltage | 8.5 |
ICC @ nom voltage | 0.02 |
IOL | 8 |
IOH | -8 |
Rating | Catalog |
Operating temperature range | -40 to 125 |
Package Group | PDIP|14 |
Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
Approx. price | 0.08 | 1ku |