CD74HCT125 - High Speed CMOS Logic Quad Buffers with 3-State Outputs

The ’HC125 and ’HCT125 contain 4 independent three-state buffers, each having its own output enable input, which when "HIGH" puts the output in the high impedance state.

Products containing the "CD74HCT125" keyword are: CD74HCT125E , CD74HCT125E , CD74HCT125E. , CD74HCT125EE4 , CD74HCT125M , CD74HCT125M96 , CD74HCT125M96 , CD74HCT125M96 SOP3.9 , CD74HCT125M96E4 , CD74HCT125M96E4 , CD74HCT125M96G4 , CD74HCT125ME4 , CD74HCT125MG4 , CD74HCT125MT , CD74HCT125MT , CD74HCT125MTE4 , CD74HCT125MTG4 , CD74HCT125PWR

• Three-State Outputs
• Separate Output Enable Inputs
• Fanout (Over Temperature Range)
  • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
  • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55°C to 125°C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
  • 2V to 6V Operation
  • High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC at V_CC = 5V
• HCT Types
  • 4.5V to 5.5V Operation
  • Direct LSTTL Input Logic Compatibility, V_IL = 0.8V (Max), V_IH = 2V (Min)
  • CMOS Input Compatibility, I_l 1µA at V_OL, V_OH

Data sheet acquired from Harris Semiconductor