The SN74LVC1G332 device performs the Boolean function in positive logic.
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This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Products containing the "SN74LVC1G332" keyword are: SN74LVC1G332DBVR , SN74LVC1G332DBVR , SN74LVC1G332DBVRG4 , SN74LVC1G332DCKR , SN74LVC1G332DCKR , SN74LVC1G332DCKRG4 , SN74LVC1G332DCKRG4 , SN74LVC1G332DRLR , SN74LVC1G332DRLR , SN74LVC1G332DRLR/CZR , SN74LVC1G332DRLRG4 , SN74LVC1G332DRY2 , SN74LVC1G332DRY2 , SN74LVC1G332DRYR , SN74LVC1G332DRYR , SN74LVC1G332DSF2 , SN74LVC1G332DSF2 , SN74LVC1G332DSFR , SN74LVC1G332DSFR , SN74LVC1G332YEPR| Status | ACTIVE |
| SubFamily | OR gate |
| Technology Family | LVC |
| VCC | 5.5 |
| Channels | 1 |
| Inputs per channel | 3 |
| ICC @ nom voltage | 0.01 |
| IOL | 32 |
| IOH | -32 |
| Input type | Standard CMOS |
| Output type | Push-Pull |
| Features | Partial Power Down (Ioff)^Over-Voltage Tolerant Inputs^Ultra High Speed (tpd <5ns) |
| Data rate | 100 |
| Rating | Catalog |
| Operating temperature range | -40 to 125 |
| Package Group | DSBGA|6 |
| Package size: mm2:W x L (PKG) | See datasheet (DSBGA) |
| Approx. price | 0.07 | 1ku |