This single 2-input positive-OR gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G32-Q1 performs the Boolean function Y = A + B or Y = (A\ B\)\ in positive logic.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Status | ACTIVE |
SubFamily | OR gate |
Technology Family | LVC |
VCC | 5.5 |
Channels | 1 |
Inputs per channel | 2 |
ICC @ nom voltage | 0.025 |
IOL | 32 |
IOH | -32 |
Input type | Standard CMOS |
Output type | Push-Pull |
Features | Partial Power Down (Ioff)^Over-Voltage Tolerant Inputs^Very High Speed (tpd 5-10ns) |
Data rate | 100 |
Rating | Automotive |
Operating temperature range | -40 to 125 |
Package Group | SC70|5 |
Package size: mm2:W x L (PKG) | [pf]5SC70[/pf]: 4 mm2: 2.1 x 2 (SC70|5) |
Approx. price | 0.08 | 1ku |