This dual 2-input positive-OR gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.
The SN74AUC2G32 performs the Boolean function Y = A + B or Y = A × B in positive logic.
NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
For more information about AUC Little Logic devices, please refer to the TI application report, Applications of Texas Instruments AUC Sub-1-V Little Logic Devices, literature number SCEA027.
Products containing the "SN74AUC2G32" keyword are: SN74AUC2G32DCTR , SN74AUC2G32DCTR , SN74AUC2G32DCUR , SN74AUC2G32DCUR , SN74AUC2G32DCURE4 , SN74AUC2G32DCURE4 , SN74AUC2G32DCURG4 , SN74AUC2G32YZPR , SN74AUC2G32YZPR , SN74AUC2G32YZPRB , SN74AUC2G32YZTR , SN74AUC2G32YZTRNanoFree is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
Status | ACTIVE |
SubFamily | OR gate |
Technology Family | AUC |
VCC | 2.7 |
Channels | 2 |
Inputs per channel | 2 |
ICC @ nom voltage | 0.01 |
IOL | 9 |
IOH | -9 |
Input type | Standard CMOS |
Output type | Push-Pull |
Features | Partial Power Down (Ioff)^Over-Voltage Tolerant Inputs^Ultra High Speed (tpd <5ns) |
Data rate | 250 |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | DSBGA|8 |
Package size: mm2:W x L (PKG) | See datasheet (DSBGA) |
Approx. price | 0.14 | 1ku |