CD4071B, CD4072B and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR function and supplement the existing family of CMOS gates.
The CD4071B, CD4072B, and CD4075B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes) and 14-lead thin shrink small-outline packages (PW and PWR suffixes).
Data sheet acquired from Harris Semiconductor
Status | ACTIVE |
SubFamily | OR gate |
Technology Family | CD4000 |
VCC | 18 |
Channels | 3 |
Inputs per channel | 3 |
ICC @ nom voltage | 0.015 |
IOL | 1.5 |
IOH | -1.5 |
Input type | Standard CMOS |
Output type | Push-Pull |
Features | Standard Speed (tpd > 50ns) |
Data rate | 8 |
Rating | Military |
Operating temperature range | -55 to 125 |
Package Group | CDIP|14 |
Package size: mm2:W x L (PKG) | See datasheet (CDIP) |
Approx. price |