DIR9001 - 96kHz Digital Audio Receiver

Updated : 2020-01-09 14:24:43
Description

The DIR9001 is a digital audio interface receiver that can receive a 28-kHz to 108-kHz sampling- frequency, 24-bit-data-word, biphase-encoded signal. The DIR9001 complies with IEC60958-3, JEITA CPR-1205 (Revised version of EIAJ CP-1201), AES3, EBUtech3250, and it can be used in various applications that require a digital audio interface.

The DIR9001 supports many output system clock and output data formats and can be used flexibly in many application systems. As the all functions which the DIR9001 provides can be controlled directly through control pins, it can be used easily in an application system that does not have a microcontroller. Also, as dedicated pins are provided for the channel-status bit and user-data bit, processing of their information can be easily accomplished by connecting with a microcontroller, DSP, or others.

The DIR9001 does not require an external clock source or resonator for decode operation if the internal actual-sampling-frequency calculator is not used. Therefore, it is possible to reduce the cost of a system.

The operating temperature range of the DIR9001 is specified as –40°C to 85°C, which makes it suitable for automotive applications.

Products containing the "DIR9001" keyword are: DIR9001 , DIR9001IPWQ1 , DIR9001IPWQ1 , DIR9001IPWR , DIR9001IPWRQ1 , DIR9001IPWRQ1 , DIR9001IPWRQ1G4 , DIR9001IQ1 , DIR9001PW , DIR9001PW , DIR9001PWG4 , DIR9001PWR , DIR9001PWR(P/B) , DIR9001PWR-1 , DIR9001PWRG4 , DIR9001S1PWR
Features

  • One-Chip Digital Audio Interface Receiver (DIR)
    Including Low-Jitter Clock-Recovery System
  • Compliant With Digital Audio Interface Standards:
    IEC60958 (former IEC958), JEITA CPR-1205
    (former EIAJ CP-1201, CP-340), AES3, EBU
    tech3250
  • Clock Recovery and Data Decode From Biphase
    Input Signal, Generally Called S/PDIF, EIAJ CP-
    1201, IEC60958, AES/EBU
  • Biphase Input Signal Sampling Frequency (fS)
    Range: 28 kHz to 108 kHz
  • Low-Jitter Recovered System Clock: 50 ps
  • Jitter Tolerance Compliant With IEC60958-3
  • Selectable Recovered System Clock: 128 fS,
    256 fS, 384 fS, 512 fS
  • Serial Audio Data Output Formats: 24-Bit I2S;
    MSB-First, 24-Bit Left-Justified; MSB-First 16-, 24-
    Bit Right-Justified
  • User Data, Channel-Status Data Outputs
    Synchronized With Decoded Serial Audio Data
  • No External Clock Required for Decode
  • Includes Actual Sampling Frequency Calculator
    (Needs External 24.576-MHz Clock)
  • Function Control: Parallel (Hardware)
  • Functions Similar and Pin Assignments Equivalent
    to Those of DIR1703
  • Single Power Supply: 3.3 V (2.7 V to 3.6 V)
  • Wide Operating Temperature Range: –40°C to
    85°C
  • 5 V-Tolerant Digital Inputs
  • Package: 28-pin TSSOP, Pin Pitch: 0,65 mm