LMX2595 - 10 MHz - 19 GHz Wideband RF Synthesizer with Phase Synchronization and JESD204B support

Updated : 2020-01-09 14:25:36
Description

The LMX2595 high-performance, wideband synthesizer that can generate any frequency from10 MHz to 19 GHz. An integrated doubler is used for frequencies above 15 GHz.   The highperformance PLL with figure of merit of –236 dBc/Hz and high-phase detector frequency can attainvery low in-band noise and integrated jitter. The high speed N-divider has no pre-divider, thussignificantly reducing the amplitude and number of spurs. There is also a programmable input multiplier to mitigate integer boundary spurs.

The LMX2595 allows users to synchronize the output of multiple devices and also enablesapplications that need deterministic delay between input and output. A frequency ramp generator cansynthesize up to 2 segments of ramp in an automatic ramp generation option or a manual option formaximum flexibility. The fast calibration algorithm allows changing frequencies faster than 20 µs.The LMX2595 adds support for generating or repeating SYSREF (compliant to JESD204B standard) makingit an ideal low-noise clock source for high-speed data converters. Fine delay adjustment (9-psresolution) is provided in this configuration to account for delay differences of  board traces.

The output drivers within LMX2595 deliver output power as high as 7 dBm at 15-GHz carrierfrequency. The device runs from a single 3.3-V supply and has integrated LDOs that eliminate theneed for on-board low noise LDOs.

Products containing the "LMX2595" keyword are: LMX2595EVM , LMX2595RHAR , LMX2595RHAR , LMX2595RHAT , LMX2595RHAT
Features

  • 10-MHz to 19-GHz Output Frequency
  • –110 dBc/Hz Phase Noise at 100-kHz Offset With 15-GHz Carrier
  • 45-fs rms Jitter at 7.5 GHz (100 Hz to 100 MHz)
  • Programmable Output Power
  • PLL Key Specifications
    • Figure of Merit: –236 dBc/Hz
    • Normalized 1/f Noise: –129 dBc/Hz
    • High Phase Detector Frequency
      • 400-MHz Integer Mode
      • 300-MHz Fractional Mode
    • 32-bit Fractional-N Divider
  • Remove Integer Boundary Spurs With Programmable Input Multiplier
  • Synchronization of Output Phase Across Multiple Devices
  • Support for SYSREF With 9-ps Resolution Programmable Delay
  • Frequency Ramp and Chirp Generation Ability for FMCW Applications
  • < 20-µs VCO Calibration Speed
  • 3.3-V Single Power Supply Operation

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