SN74AVCBH324245 - 32-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation and 3-State Outputs

Updated : 2020-01-09 14:32:44
Description

This 32-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVCBH324245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the outputs, so the buses are effectively isolated.

The SN74AVCBH324245 is designed so that the control pins (1DIR, 2DIR, 1OE\, and 2OE\) are supplied by VCCB.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCB through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. If either VCC input is at GND, both ports are in the high-impedance state.

Products containing the "SN74AVCBH324245" keyword are: SN74AVCBH324245KR
Features

  • Member of the Texas Instruments Widebus+™ Family
  • DOC™ Circuitry Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed Degradation
  • Dynamic Drive Capability Is Equivalent to Standard Outputs With IOH and IOL of
    • ±24 mA at 3-V VCC
    • ±15 mA at 2.3-V VCC
    • ±9 mA at 1.65-V VCC
    • ±6 mA at 1.4-V VCC
  • Control Inputs VIH/VIL Levels Are Referenced to VCCB Voltage
  • If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
  • Inputs/Outputs Can Tolerate Up To 4.6 V, Which Allows Mixed-Voltage-Mode Data Communications
  • Ioff Supports Partial-Power-Down Mode Operation
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate Over Full 1.4-V to 3.6-V Power-Supply Range
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

DOC and Widebus+ are trademarks of Texas Instruments.

Parametrics
StatusACTIVE
SubFamilyDirection controlled voltage translation
Technology FamilyAVC
Bits32
VCC3.6
FeaturesPartial power down (Ioff)^Over-voltage tolerant inputs^Output enable^Output damping resistors
RatingCatalog
Package GroupLFBGA|96
Package size: mm2:W x L (PKG)[pf]96LFBGA[/pf]: 74 mm2: 5.5 x 13.5 (LFBGA|96)
ICCA static current0.08
ICCB static current0.08
Static Current0.16
Schmitt Trigger