CD74AC646 - Octal Non-Inverting Bus Transceivers/Registers with 3-State Outputs

The RCA CD54/74AC646 and CD54/74AC648 and the CD54/74ACT646 and CD54/74ACT648 3-state, octal-bus transceiver/registers use the RCA ADVANCED CMOS technology. The CD54/74AC648 and CD54/74ACT648 have inverting outputs. The CD54/74AC646 and CD54/74ACT646 have non-inverting outputs. These devices are bus transceivers with D-type flip-flops which act as internal storage registers on the LOW-to-HIGH transition of either CAB or CBA clock inputs. Output Enable (OE\) and Direction (DIR) inputs control the transceiver functions. Data present at the high-impedance output can be stored in either register or both but only one of the two buses can be enabled as outputs at any one time. The Select controls (SAB and SBA) can multiplex stored and transparent (real time) data. The Direction control determines which data bus will receive data when the Output Enable (OE\) is LOW. In the high-impednace mode (Output Enable HIGH), A data can be stored in one register and B data can be stored in the other register. The clocks are not gated with the Direction (DIR) and Output Enable (OE\) terminals; data at the A or B terminals can be clocked into the storage flip-flops at any time.

The CD74AC/ACT646 and CD74AC/ACT648 are supplied in 24-lead dual-in-line narrow-body plastic packages (EN suffix) and in 24-lead dual-in-line small-outline plastic packages (M suffix). Both package types are operable over the following temperature ranges: Commercial (0 to 70°C); Industrial (-40 to +85°C); and Extended Industrial/Military (-55 to +125°C).

The CD54/ACT646 and CD54AC/ACT648, available in chip form (H suffix), are operable over the -55 to +125°C temperature range.

Products containing the "CD74AC646" keyword are: CD74AC646EN , CD74AC646M , CD74AC646M , CD74AC646M96 , CD74AC646M96 , CD74AC646M96E4 , CD74AC646M96G4 , CD74AC646ME4 , CD74AC646MG4 , CD74AC646MG4

• Buffered inputs
• Typical propagation delay:
  5.3 ns @ V_CC = 5 V, T_A = 25°C, C_L = 50pF
• Exceeds 2-kV ESD Protection - MIL-STD-883, Method 3015
• SCR-Latchup-resistant CMOS process and circuit design
• Speed of bipolar FAST*/AS/S with significantly reduced power consumption
• Balanced propagation delays
• AC types feature 1.5-V to 5.5-V operation and balanced noise immunity at 30% of the supply
• ± 24-mA output drive current
  - Fanout to 15 FAST* ICs
  - Drives 50-ohm transmission lines
• Characterized for operation from –40° to 85°C

*FAST is a Registered Trademark of Fairchild Semiconductor Corp.