The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
Products containing the "TLV5619" keyword are: TLV5619 , TLV5619-TLV5639EVM , TLV5619-TLV5639EVM , TLV5619C , TLV5619CDW , TLV5619CDW , TLV5619CDWG4 , TLV5619CDWR , TLV5619CDWRG , TLV5619CDWRG4 , TLV5619CPW , TLV5619CPWG4 , TLV5619CPWG4 , TLV5619CPWR , TLV5619CPWR , TLV5619CPWRG4 , TLV5619CPWRG4 TLV5619CPW , TLV5619I , TLV5619IDM , TLV5619IDRG4Status | ACTIVE |
SubFamily | Precision DACs (<=10MSPS) |
Resolution | 12 |
Settling Time | 1 |
Sample / Update Rate | 1 |
DAC channels | 1 |
Architecture | String |
Power consumption | 4.3 |
Interface | Parallel |
INL | 4 |
Reference: type | Ext |
Output type | Buffered Voltage |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | SOIC|20 |
Package size: mm2:W x L (PKG) | [pf]20SOIC[/pf]: 132 mm2: 10.3 x 12.8 (SOIC|20) |
Approx. price | 5.32 | 1ku |
SFDR | 72 |