The DAC5681 is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input and internal voltage reference. The DAC5681 offers superior linearity and noise performance.
The DAC5681 integrates a wideband LVDS port with on-chip termination, providing full 1.0 GSPS data transfer into the DAC and lower EMI than traditional CMOS data interfaces. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock.
The current-steering architecture of the DAC5681 consists of a segmented array of current sinking switches directing up to 20mA of full-scale current to complementary output nodes. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used.
The DAC5681 is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin QFN package. The device is pin upgradeable to the other members of the family: the DAC5681Z and DAC5682Z. The single-channel DAC5681Z and dual-channel DAC5682Z both provide optional 2x/4x interpolation and a clock multiplying PLL.
Products containing the "DAC5681" keyword are: DAC5681EVM , DAC5681EVM , DAC5681IRGC25 , DAC5681IRGCR , DAC5681IRGCT , DAC5681IRGCT , DAC5681IRGCT. , DAC5681IRGCT.IRGCR , DAC5681IRGCTG4 , DAC5681ZEVM , DAC5681ZIRGCR , DAC5681ZIRGCTStatus | ACTIVE |
SubFamily | High-speed DACs (>10MSPS) |
Resolution | 16 |
Settling Time | 0.0104 |
Sample / Update Rate | 1000 |
DAC channels | 1 |
Architecture | Current Sink |
Power consumption | 650 |
Interface | Parallel LVDS |
INL | |
Reference: type | Int |
Output type | |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | VQFN|64 |
Package size: mm2:W x L (PKG) | [pf]64VQFN[/pf]: 81 mm2: 9 x 9 (VQFN|64) |
Approx. price | 28.88 | 1ku |
SFDR | 81 |