DAC5662A - Dual-Channel, 12-Bit, 275-MSPS Digital-to-Analog Converter (DAC)

Updated : 2020-01-09 14:29:45
Description

The DAC5662A is a monolithic, dual-channel 12-bit high-speed digital-to-analog converter (DAC) with on-chip voltage reference.

Operating with update rates of up to 275 MSPS, the DAC5662A offers exceptional dynamic performance and tight-gain and offset matching, characteristics that make it suitable in either I/Q baseband or direct IF communication applications.

Each DAC has a high-impedance differential current output, suitable for single-ended or differential analog-output configurations. External resistors allow scaling the full-scale output current for each DAC separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used.

The DAC5662A has two 12-bit parallel input ports with separate clocks and data latches. For flexibility, the DAC5662A also supports multiplexed data for each DAC on one port when operating in the interleaved mode.

The DAC5662A has been specifically designed for a differential transformer coupled output with a 50- doubly terminated load. For a 20-mA full-scale output current a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (–2 dBm output power) are supported.

The DAC5662A is available in a 48-pin thin quad FlatPack (TQFP). Pin compatibility between family members provides 12-bit (DAC5662A) and 14-bit (DAC5672) resolution. Furthermore, the DAC5662A is pin compatible to the DAC2902 and AD9765 dual DACs. The device is characterized for operation over the industrial temperature range of –40°C to 85°C.

Products containing the "DAC5662A" keyword are: DAC5662AIPFB , DAC5662AIPFB , DAC5662AIPFBG4 , DAC5662AIPFBR , DAC5662AIPFBRG4 , DAC5662AIPFBRG4
Features

  • 12-Bit Dual Transmit DAC
  • 275 MSPS Update Rate
  • Single Supply: 3 V - 3.6 V
  • High SFDR: 85 dBc at 5 MHz
  • High IMD3: 78 dBc at 15.1 and 16.1 MHz
  • WCDMA ACLR: 70 dB at 30.72 MHz
  • Independent or Single Resistor Gain Control
  • Dual or Interleaved Data
  • On-Chip 1.2-V Reference
  • Low Power: 330 mW
  • Power-Down Mode: 15 mW
  • Package: 48-Pin TQFP
  • APPLICATIONS
    • Cellular Base Transceiver Station Transmit Channel
      • CDMA: W-CDMA, CDMA2000, IS-95
      • TDMA: GSM, IS-136, EDGE/UWC-136
    • Medical/Test Instrumentation
    • Arbitrary Waveform Generators (ARB)
    • Direct Digital Synthesis (DDS)
    • Cable Modem Termination System (CMTS)