By using a half-flash conversion technique, the 8-bit ADC0820-N CMOS A/D offers a 1.5 µs conversion time and dissipates only 75 mW of power. The half-flash technique consists of 32 comparators, a most significant 4-bit ADC and a least significant 4-bit ADC.
The input to the ADC0820-N is tracked and held by the input sampling circuitry eliminating the need for an external sample-and-hold for signals moving at less than 100 mV/µs.
For ease of interface to microprocessors, the ADC0820-N has been designed to appear as a memory location or I/O port without the need for external interfacing logic.
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| Status | ACTIVE |
| SubFamily | Precision ADCs (<=10MSPS) |
| Resolution | 8 |
| Sample Rate | 0.658 |
| Number of input channels | 1 |
| INL | 1 |
| SNR | |
| SFDR | |
| Power consumption | 65 |
| Interface | Parallel |
| Architecture | SAR |
| Operating temperature range | -40 to 85 |
| Rating | Catalog |
| Package Group | SOIC|20 |
| Package size: mm2:W x L (PKG) | [pf]20SOIC[/pf]: 132 mm2: 10.3 x 12.8 (SOIC|20) |
| Approx. price | 1.70 | 1ku |
| Analog input BW |