TLV320AIC3120 - Low-Power Audio CODEC With miniDSP and 2.5-W Mono Class-D Speaker Amplifier

Updated : 2020-01-09 14:24:21
Description

The TLV320AIC3120 device is a low-power, highly integrated, high-performance codec which features a mono audio DAC and mono audio ADC.

The TLV320AIC3120 device features a high-performance audio codec with 24-bit mono playback and mono record functionality. The device integrates several analog features, such as a microphone interface, headphone drivers, and speaker drivers. The TLV320AIC3120 device has a fully programmable miniDSP for digital audio processing. The digital audio data format is programmable to work with popular audio standard protocols (I2S, left-justified and right-justified) in master, slave, DSP, and TDM modes. Bass boost, treble, or EQ are supported by the programmable digital signal-processing blocks (PRB). An on-chip PLL provides the high-speed clock needed by the digital signal-processing block. The volume level is controlled either by pin control or by register control. The audio functions are controlled using the I2C serial bus.

The TLV320AIC3120 device is available in a 32-pin VQFN package.

Products containing the "TLV320AIC3120" keyword are: TLV320AIC3120EVM-U , TLV320AIC3120IRHBR , TLV320AIC3120IRHBR , TLV320AIC3120IRHBT , TLV320AIC3120IRHBT
Features

  • Mono Audio DAC With 95-dB SNR
  • Mono Audio ADC With 90-dB SNR
  • Supports 8-kHz to 192-kHz Separate DAC and ADC Sample Rates
  • Instruction-Programmable Embedded miniDSP
  • Mono Class-D BTL Speaker Driver (2.5 W Into 4 Ω or 1.6 W Into 8 Ω) Output
  • Mono Headphone/Lineout Outputs
  • One Differential or Three Single-Ended Inputs With Mixing and Level Control
  • Microphone With Bias, Preamp PGA, and AGC
  • Built-in Digital Audio Processing Blocks (PRB) With User-Programmable Biquad, FIR Filters, and DRC
  • Bass Boost/Treble/EQ With up to Five Biquads for Record and up to Six Biquads for Playback
  • Digital Mixing Capability
  • Pin Control or Register Control for Digital Playback Volume Control Settings
  • Programmble PLL for Flexible Clock Generation
  • I2S, Left-Justified, Right-Justified, DSP, and TDM Audio Interfaces
  • I2C Control With Register Auto-Increment
  • Full Power-Down Control
  • Power Supplies:
    • Analog: 2.7 V–3.6 V
    • Digital Core: 1.65 V–1.95 V
    • Digital I/O: 1.1 V–3.6 V
    • Class-D: 2.7 V–5.5V (SPKVDD ≥ AVDD)
  • 5-mm × 5-mm 32-QFN Package