LM98714 - 3 Ch 16-Bit 45 MSPS Digital Copier AFE w/ Integrated CCD/CIS Sensor Timing Generator & LVDS Outp

Updated : 2020-01-09 14:30:26
Description

The LM98714 is a fully integrated, high performance 16-Bit, 45 MSPS signal processingsolution for digital color copiers, scanners, and other image processing applications. High-speedsignal throughput is achieved with an innovative architecture utilizing Correlated Double Sampling(CDS), typically employed with CCD arrays, or Sample and Hold (S/H) inputs (for Contact ImageSensors and CMOS image sensors). The signal paths utilize 8 bit Programmable Gain Amplifiers (PGA),a ±9-Bit offset correction DAC and independently controlled Digital Black Level correction loopsfor each input. The PGA and offset DAC are programmed independently allowing unique values of gainand offset for each of the three inputs. The signals are then routed to a 45 MHz high performanceanalog-to-digital converter (ADC). The fully differential processing channel shows exceptionalnoise immunity, having a very low noise floor of –74dB. The 16-bit ADC has excellent dynamicperformance making the LM98714 transparent in the image reproduction chain.

Products containing the "LM98714" keyword are: LM98714 , LM98714BCMT , LM98714BCMT/LM98714CCMT , LM98714BCMT/NOPB , LM98714BCMT/NOPB , LM98714BCMTX , LM98714BCMTX/NOPB , LM98714BCMTX/NOPB , LM98714BCMTXNOPB , LM98714CCMT , LM98714CCMT/NOPB , LM98714CCMT/NOPB , LM98714CCMTX , LM98714CCMTX/NOPB , LM98714CCMTX/NOPB , LM98714CCMTX/NOPB. , LM98714CCMTXNOPB , LM98714CCMTXNOPB. , LM98714EB01 , LM98714EB01/NOPB
Features

  • LVDS/CMOS Outputs
  • LVDS/CMOS Pixel Rate Input Clock or ADC Input Clock
  • CDS or S/H Processing for CCD or CIS Sensors
  • Independent Gain/Offset Correction for Each Channel
  • Digital Black Level Correction Loop for Each Channel
  • Programmable Input Clamp Voltage
  • Flexible CCD/CIS Sensor Timing Generator
  • Key Specifications
    • Maximum Input Level: 1.2 or 2.4 Volt Modes
      • (Both with + or – Polarity Option)
    • ADC Resolution: 16-Bit
    • ADC Sampling Rate: 45 MSPS
    • INL: ±23 LSB (Typ)
    • Channel Sampling Rate: 15/22.5/30 MSPS
    • PGA Gain Steps: 256 Steps
    • PGA Gain Range: 0.7 to 7.84x
    • Analog DAC Resolution: ±9 Bits
    • Analog DAC Range: ±300 mV or ±600 mV
    • Digital DAC Resolution: ±6 Bits
    • Digital DAC Range: –1024 LSB to + 1008 LSB
    • SNR: –74dB (at 0 dB PGA Gain)
    • Power Dissipation: 505 mW (LVDS) 610 mW (CMOS)
    • Operating Temp: 0 to 70°C
    • Supply Voltage: 3.3 V Nominal (3.0 V to 3.6 V Range)

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