SN74LS423 - Dual Retriggerable Monostable Multivibrators

The 'LS422 and 'LS423 are identical to 'LS122 and 'LS123 except they cannot be triggered via clear.

These d-c triggered multivibrators feature output-pulse-width control by three methods. The basic pulse time is programmed by selection of external resistance and capacitance values (see typical application data). The 'LS422 contains an internal timing resistor that allows the circuits to be used with only an external capacitor, if so desired. Once triggered, the basic pulse width may be extended by retriggering the gated low-level-active (A) or high-level-active (B) inputs, or be reduced by use of the overriding clear. Figure 1 illustrates pulse control by retriggering and early clear.

The 'LS422 and 'LS423 have enough Schmitt hysteresis to ensure jitter-free triggering from the B input with transition rates as slow as 0.1 millivolt per nanosecond. The 'LS422 R_int is nominally 10 k ohms.

The SN54LS422 and SN54LS423 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LS422 and SN74LS423 are characterized for operation from 0°C to 70°C.FIGURE 1-TYPICAL INPUT/OUTPUT PULSES

 

Products containing the "SN74LS423" keyword are: SN74LS423D , SN74LS423D , SN74LS423DG4 , SN74LS423DG4 , SN74LS423DR , SN74LS423DR , SN74LS423N , SN74LS423N , SN74LS423NE4 , SN74LS423NE4 , SN74LS423NG4 , SN74LS423NS , SN74LS423NSR , SN74LS423NSR , SN74LS423NSRG4

• Will Not Trigger from Clear
• D-C Triggered from Active-High or Active-Low Gated Logic Inputs
• Retriggerable for Very Long Output Pulses, Up to 100% Duty Cycle
• Overriding Clear Terminates Output Pulse
• 'LS422 Has Internal Timing Resistor

An external timing capacitor may be connected between C_ext and R_ext/C_ext (positive).

To use the internal timing resistor of 'LS422, connect R_int to V_CC.

For improved pulse width accuracy and repeatability, connect an external resistor between R_ext/C_ext and V_CC with R_int open-circuited.

To obtain variable pulse widths, connect an external variable resistance between R_int or R_ext/C_ext and V_CC.