The 'S124 features two independent voltage-controlled oscillators (VCO) in a single monolithic chip. The output frequency of each VCO is established by an external capacitor in combination with two voltage-sensitive inputs, one for frequency range and one for frequency control. These inputs can be used to vary the output frequency as shown under typical characteristics. These highly stable oscillators can be set to operate at any frequency typically between 0.12 hertz and 85 megahertz.
While the enable input is low, the output is enabled. While the enable input is high, the output is high.
These devices can operate from a single 5-volt supply. However, one set of supply-voltage and ground pins (VCC and GND) is provided for the enable, synchronization-gating, and output sections, and a separate set ( GND) and is provided for the oscillator and associated frequency-control circuits so that effective isolation can be accomplished in the system.
The enable input of these devices starts or stops the output pulses when it is low or high, respectively. The internal oscillator of the 'S124 is started and stopped by the enable input. The enable input is one standard load; it and the buffered output operate at standard Schottky-clamped TTL levels.
The pulse synchronization-gating section ensures that the first output pulse is neither clipped nor extended. Duty cycle of the square-wave output is fixed at approximately 50 percent.
The SN54S124 is characterized for operation over the full military temperature range of 55°C to 125°C; the SN74S124 is characterized for operation from 0°C to 70°C.
Status | ACTIVE |
SubFamily | Phase-locked-loop (PLL)/oscillator |
Technology Family | S |
VCC | 5.25 |
Bits | 1 |
Voltage | 5 |
F @ nom voltage | 50 |
ICC @ nom voltage | 150 |
tpd @ Nom Voltage | 70 |
Rating | Military |
Operating temperature range | -55 to 125 |
Package Group | CDIP|16 |
Package size: mm2:W x L (PKG) | See datasheet (CDIP) |
Approx. price |