The HC251 and HCT251 are 8-channel digital multiplexers with three-state outputs, fabricated with high-speed silicon-gate CMOS technology. Together with the low power consumption of standard CMOS integrated circuits, they possess the ability to drive 10 LSTTL loads. The three-state feature makes them ideally suited for interfacing with bus lines in a bus-oriented system.
This multiplexer features both true (Y) and complement (Y\) outputs as well as an output enable (OE\) input. The OE\ must be at a low logic level to enable this device. When the OE\ input is high, both outputs are in the high-impedance state. When enabled, address information on the data select inputs determines which data input is routed to the Y and Y\ outputs. The HCT251 logic family is speed, function, and pin-compatible with the standard LS251.
Products containing the "CD74HC251" keyword are: CD74HC251 , CD74HC251E , CD74HC251E , CD74HC251EE4 , CD74HC251EE4 , CD74HC251EG4 , CD74HC251M , CD74HC251M , CD74HC251M/SN74HC251D , CD74HC251M96 , CD74HC251M96 , CD74HC251M96E4 , CD74HC251M96G4 , CD74HC251ME4 , CD74HC251MG4 , CD74HC251MG4 , CD74HC251MT , CD74HC251MT , CD74HC251MTE4 , CD74HC251MTG4Status | ACTIVE |
SubFamily | Encoders & decoders |
Technology Family | HC |
VCC | 6 |
Bits | 2 |
Voltage | 3.3^5 |
F @ nom voltage | 28 |
ICC @ nom voltage | 0.08 |
tpd @ Nom Voltage | 21 |
Rating | Catalog |
Operating temperature range | -55 to 125 |
Package Group | PDIP|16 |
Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
Approx. price | 0.27 | 1ku |