CD4063B is a 4-bit magnitude comparator designed for use in computer and logic applications that require the comparison of two 4-bit words. This logic circuit determines whether one 4-bit word (Binary or BCD) is "less than", "equal to", or "greater than" a second 4-bit word.
The CD4063B has eight comparing inputs (A3, B3, through A0, B0), three outputs (A < B, A = B, A > B) and three cascading inputs (A < B, A = B, A > B) that permit systems designers to expand the comparator function to 8, 12, 16 . . . 4N bits. When a single CD4063B is used, the cascading inputs are connected as follows: (A < B) = low, (A = B) = high, (A > B) = low.
For words longer than 4 bits, CD4063B devices may be cascaded by connecting the outputs of the less-significant comparator to the corresponding cascading inputs of the more-significant comparator. Cascading inputs (A < B, A = B, and A > B) on the least significant comparator are connected to a low, a high, and a low level, respectively.
The CD4063B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes). This device is pin-compatible with the standard 7485 TTL type.
Data sheet acquired from Harris Semiconductor.
Status | ACTIVE |
SubFamily | Digital comparator |
Technology Family | CD4000 |
VCC | 18 |
Bits | 4 |
Voltage | 10 |
F @ nom voltage | 8 |
ICC @ nom voltage | 0.3 |
tpd @ Nom Voltage | 500 |
Rating | Military |
Operating temperature range | -55 to 125 |
Package Group | CDIP|16 |
Package size: mm2:W x L (PKG) | See datasheet (CDIP) |
Approx. price |