The 'LV175A devices are quadruple D-type flip-flops designed for 2-V to 5.5-V VCC operation.
These devices have a direct clear (CLR\) input and feature complementary outputs from each flip-flop.
Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse.
Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output.
Products containing the "SN74LV175A" keyword are: SN74LV175AD , SN74LV175AD , SN74LV175ADBR , SN74LV175ADBRE4 , SN74LV175ADBRE4 , SN74LV175ADE4 , SN74LV175ADG4 , SN74LV175ADG4 , SN74LV175ADGV , SN74LV175ADGVR , SN74LV175ADGVR , SN74LV175ADGVRG4 , SN74LV175ADR , SN74LV175ADR , SN74LV175ADRE4 , SN74LV175ANSR , SN74LV175ANSR , SN74LV175ANSRG4 , SN74LV175APW , SN74LV175APW| Status | ACTIVE |
| SubFamily | D-type flip-flop |
| Technology Family | LV-A |
| VCC | 5.5 |
| Bits | 4 |
| Voltage | 2.5^3.3^5 |
| F @ nom voltage | 70 |
| ICC @ nom voltage | 0.02 |
| tpd @ Nom Voltage | 20^12^7.5 |
| 3-state output | No |
| Rating | Catalog |
| Operating temperature range | -40 to 85 |
| Package Group | SOIC|16 |
| Package size: mm2:W x L (PKG) | [pf]16SO[/pf]: 80 mm2: 7.8 x 10.2 (SO|16) |
| Approx. price | 0.28 | 1ku |