The AHC174 devices are positive-edge-triggered D-type flip-flops with a direct clear (CLR)\ input and are designed for 2-V to 5.5-V VCC operation.
Information at the data (D) inputs that meets the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output.
Products containing the "SN74AHC174" keyword are: SN74AHC174D , SN74AHC174D , SN74AHC174DB , SN74AHC174DBR , SN74AHC174DBR , SN74AHC174DBRE4 , SN74AHC174DG4 , SN74AHC174DGVR , SN74AHC174DGVRE4 , SN74AHC174DGVRE4 , SN74AHC174DGVRG4 , SN74AHC174DR , SN74AHC174DR , SN74AHC174DR(AHC174) , SN74AHC174DR-TI , SN74AHC174N , SN74AHC174N , SN74AHC174NE4 , SN74AHC174NSR , SN74AHC174NSRE4| Status | ACTIVE |
| SubFamily | D-type flip-flop |
| Technology Family | AHC |
| VCC | 5.5 |
| Bits | 6 |
| Voltage | 3.3^5 |
| F @ nom voltage | 110 |
| ICC @ nom voltage | 0.04 |
| tpd @ Nom Voltage | 16.5^10.5 |
| 3-state output | No |
| Rating | Catalog |
| Operating temperature range | -40 to 85 |
| Package Group | PDIP|16 |
| Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
| Approx. price | 0.12 | 1ku |