This positive-edge-triggered D-type flip-flop has a direct clear (CLR)\ input. The CD74ACT175 features complementary outputs from each flip-flop.
Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output.
Products containing the "CD74ACT175" keyword are: CD74ACT175E , CD74ACT175E , CD74ACT175EE4 , CD74ACT175EE4 , CD74ACT175EG4 , CD74ACT175M , CD74ACT175M , CD74ACT175M96 , CD74ACT175M96 , CD74ACT175M96E4 , CD74ACT175M96G4 , CD74ACT175ME4 , CD74ACT175ME4 , CD74ACT175MG4 , CD74ACT175MG4| Status | ACTIVE |
| SubFamily | D-type flip-flop |
| Technology Family | ACT |
| VCC | 5.5 |
| Bits | 4 |
| Voltage | 5 |
| F @ nom voltage | 90 |
| ICC @ nom voltage | 0.08 |
| tpd @ Nom Voltage | 10.5 |
| 3-state output | No |
| Rating | Catalog |
| Operating temperature range | -55 to 125 |
| Package Group | PDIP|16 |
| Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
| Approx. price | 0.35 | 1ku |