SN74LVTH162244 - 3.3.-V ABT 16-Bit Buffers/Drivers With 3-State Outputs

Updated : 2020-01-09 14:33:20
Description

The 'LVTH162244 devices are 16-bit buffers and line drivers designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical active-low output-enable (OE) inputs.

The outputs, which are designed to source or sink up to 12 mA, include equivalent 22- series resistors to reduce overshoot and undershoot.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

Products containing the "SN74LVTH162244" keyword are: SN74LVTH162244DGGR , SN74LVTH162244DGGR , SN74LVTH162244DGGR TSSOP , SN74LVTH162244DGGRE4 , SN74LVTH162244DGGRG4 , SN74LVTH162244DGGRTI , SN74LVTH162244DL , SN74LVTH162244DL , SN74LVTH162244DL(LVTH162 , SN74LVTH162244DLG4 , SN74LVTH162244DLG4 , SN74LVTH162244DLR , SN74LVTH162244DLR , SN74LVTH162244DLRG , SN74LVTH162244DLRG4 , SN74LVTH162244KR , SN74LVTH162244KR
Features

  • Members of the Texas Instruments Widebus™ Family
  • Output Ports Have Equivalent 22- Series Resistors, So No External Resistors Are Required
  • Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
  • Support Unregulated Battery Operation Down to 2.7 V
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Distributed VCC and GND Pins Minimize High-Speed Switching Noise
  • Flow-Through Architecture Optimizes PCB Layout
  • Latch-Up Performance Exceeds 500 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

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