The ’AHCT540 octal buffers/drivers are ideal for driving bus lines or buffer memory address registers. These devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board layout.
The 3-state control gate is a two-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2) input is high, all corresponding outputs are in the high-impedance state. The outputs provide inverted data when they are not in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Products containing the "SN74AHCT540" keyword are: SN74AHCT540DBR , SN74AHCT540DBR , SN74AHCT540DBR HB540 , SN74AHCT540DBRG4 , SN74AHCT540DGVR , SN74AHCT540DGVR , SN74AHCT540DGVRG4 , SN74AHCT540DW , SN74AHCT540DW , SN74AHCT540DWG4 , SN74AHCT540DWR , SN74AHCT540DWR , SN74AHCT540DWRE4 , SN74AHCT540DWRE4 , SN74AHCT540DWRG4 , SN74AHCT540N , SN74AHCT540N , SN74AHCT540NS , SN74AHCT540NSE4 , SN74AHCT540NSRStatus | ACTIVE |
SubFamily | Inverting buffer/driver |
Technology Family | AHCT |
VCC | 5.5 |
Bits | 8 |
Voltage | 5 |
F @ nom voltage | 70 |
tpd @ Nom Voltage | 10 |
ICC @ nom voltage | 0.04 |
IOL | 8 |
IOH | -8 |
Rating | Catalog |
Operating temperature range | -40 to 125 |
Package Group | PDIP|20 |
Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
Approx. price | 0.15 | 1ku |